Electronics And Telecommunications Engineering

Profile Of Electronics And Telecommunications Department

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MISSION

Department offers Diploma in Electronics and Telecommunication Engineering committed to
M1. To provide skilled manpower to industry and society
M2. To inculcate entrepreneurship abilities
M3. To prepare life-long learners by creating the outcome and practice based learning environment
M4. To develop professionalism, continuous improvement and good individual citizen.

VISION

To impart quality technical education in the field of Electronics and Telecommunication Engineering through outcome and practice based environment for creating competent manpower for providing service to society.

Competent entrepreneurs, highly valued professionals with life-long learning skills.

Act with societal, environmental, and commercial awareness.

Grow professionally in their careers through continued development of technical and management skills.

On successful completion diploma pass outs will be able to Basic knowledge:apply the basic knowledge of differential equations, vector calculus, complex variables, matrix theory, probability theory, basic sciences and fundamentals of Electronics and Telecommunication Engineering.

Discipline knowledge: identify, analyze and solve Electronics and Telecommunication Engineering problems upto the substantiate conclusions.

Experiments & Practice: design and implement electronic circuits and to analyze, interpret and experimentally validate the results.

Engineering Tools: model and simulate analog and digital systems using appropriate technologies and software tools.

The Engineer & Society: apply the knowledge of societal aspects and related responsibilities while working in industries, research laboratories and multidisciplinary tasks.

Environment & Sustainability: use modern engineering tools, software’s and equipments to analyze the impact of engineering solutions in societal and environmental contexts.

Ethics: apply ethical principles and knowledge for the benefits of society and industries.

Individual & Team Work: Work effectively as an individual and member or a leader in multidisciplinary teams.

Communication: communicate effectively in society and engineering community through verbal and written form.

Project Management & Finance: manage projects in multidisciplinary environment by applying the knowledge of engineering and management principles with the ability of continuous learning.

Lifelong Learning: be an entrepreneur or to seek employment in the industry, public sector undertakings and government organizations with the adaptability of lifelong learning in the context of technological changes.

To provide the skilled technical diploma engineer to cater the need of industry and society by keeping pace with recent technology in Electronics and Telecommunication and multi-disciplinary field.

To have professional growth of faculties through industry interaction, research, higher education and faculty training.

To accelerate interaction with alumni and industry.

We provide best infrastructure, qualified & motivated staff and well furnished classrooms and ICT Facilities

The department is well equipped with laboratories covering different courses of the Electronics & Telecommunication engineering.

The department provides excellent academic environment along co-curricular activities to create good individual citizen.

The department offers outcome based curriculum.

RESEARCH PUBLICATIONS

Paper(s) Published in Peer Reviewed Referred National and International Journals: S. D. Pable and Mohd. Hasan, “Interconnects Design for Subthreshold Circuits,” IEEE Transactions on Nanotechnology, Vol. (11), No. (3), pp. 633-639, May 2012. (doi: 10.1109/TNANO.2012.2189015), (Impact factor: 2.23) (Available on http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6158605)

S. D. Pable and Mohd. Hasan, “Interconnect Parameters Optimization to Enhance the Performance of Subthreshold Circuits,” Microelectronics Journal, Elsevier Science Publishers B. V, Vol. (44), pp.454-461, Jan. 2013.
S. B. Rahane, A.K. Kureshi, and S.D. Pable, “ A Review of Conventional and Emerging Power Gating Techniques for Leakage Power Reduction,” IJIRSET, Volume 3, Special Issue 4, pp.420-427, April 2014.

S.S. Chopade and S.D. Pable, “Optimization of Interconnect Geometrical Parameters to Enhance the Performance of Sub Threshold Circuits,” International Journal on Emerging Trends in Technology, Vol.1, No.1, 157-168, Sep. 2014.

Harshala Salve and S.D. Pable, “Design of Audio Visual System for Virtual Dictionary,” International Journal of Electrical Electronics and Communication, Vol. 19, Issue 181, pp. 1069-3074, Dec. 2015.

Mohd. Ajmal Kafeel, S. D. Pable, Mohd. Hasan, and M. Shah Alam, “Optimization and Characterization of CMOS for Ultra Low Power Applications,” Journal of Nanotechnology Volume 2015 (2015), Article ID 395090, 6 pages http://dx.doi.org/10.1155/2015/395090.

Mr. Ankit Bhatt and S.D. Pabale, “Design of High Speed 2’s Complement Multiplier,” International Journal & Magazine of Engineering, Technology, Management and Research, Volume No: 2 (2015), Issue No: 10 (October), pp. 257-265.

Kishor Katkade and Dr.S.D.Pable, "Design of Audio-Visual System for Virtual Dictionary"IJEEC: International Journal of Electrical Electronics and Communication, ISSN 2048-1069,volume:19Page-3071,Issue:18 Dec-2015.

Darshana Vispute, Sachin Pable and Devidas Dighe, " Target Recognition using Improved SIFT Algorithm," International Journal Of Engineering and Computer Science, Vol. 3, Issue 7, pp. 1-6, July 2014.

M.R.Hire and S.D. Pable, “INVESTIGATING 3-D MODEL AND PART INFORMATION FOR IMPROVING CONTENT-BASED VEHICLE RETRIEVAL,” International Journal Of Core Engineering & Management (IJCEM) Volume 2, Issue 7, pp. 36-51, October 2015.

Prashant Nagare, Dr. Sachin Pable, Dr. A.K. Kureshi, “A REVIEW OF DESIGN DIGITAL FILTER FOR HARMONICS REDUCTION IN POWER SYSTEM,” International Research Journal of Engineering and Technology (IRJET), Volume: 03 Issue: 06, June-2016.

Ashu Joshi, Dr. S.D. Pable, Dr. A.K. Kureshi, “Design of Interactive Voice Response System for Three Phase Motor,” International Research Journal of Engineering and Technology (IRJET), Volume: 03 Issue: 06, June-2016

Manasi R. Mali, Dr. S.D Pable, Prof R.S Khule, “PERFORMANCE OPTIMIZATION OF LUT IN FPGA USING CNFET,” INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY, Vol. 5, No.8, pp. 761-767, August, 2016

Neeta S. Sonwane and Dr. S. D. Pable, “Fault detection and autoline distribution system with Gsm module,” International Research Journal of Engineering and Technology (IRJET), Volume: 03 Issue: 06, June-2016

Prashant Nagare, Dr. Sachin Pable, “Design Digital Filter of Harmonic Elimination in Power System,” International Research Journal of Engineering and Technology (IRJET), Volume: 03 Issue: 06, June-2016.

International Journal OF IT Engg. & applied science (IJIEASR)VOL. 2 NO.1 Jan 2013 Neural n/w Issu 2319-4413, “ Signature registration and verification system using back propagation “ Prof B.M. Choudhari.

Paper(s) Published in Peer Reviewed Referred National and International Conferences: Rahane Sandip B., Kureshi A.K., Pable S.D. ,"A Hybrid CMOS-CNFET, 1.4-V 6.8-ppm/°C Bandgap Reference Circuit," 12th IEEE India International Conference,INDICON 2015,New Delhi, Dec. 2015.

AU Kadu, SM Turkane, SD Pable, AK Kureshi, “Implementation of a novel co-design of LVTSCR for effective ESD protection in ultra-deep submicron IC,” IEEE International Conference on Industrial Instrumentation and Control (ICIC), pp. 39- 42, May 2015.

J.G. Joshi and Shyam S. Pattnaik, “Dual Band Wearable Microstrip Patch Antenna,” Proceedings of IEEE Indian Antenna Week 2014 Workshop on Advanced Antenna Technology (IEEE IAW 2014), 26-30 May, 2014, Hotel JW Marriot, Chandigarh, India. (Prof. Rajneesh Arora Best Research Paper Award).

Chirag Arora,Shyam S. Pattnaik, R. N. Baral, andJ.G. Joshi, “Performance Enhancement of Microstrip Patch Antenna Array using SRR Loading,” Proceedings of IEEE Indian Antenna Week 2014, Workshop on Advanced Antenna Technology (IEEE IAW 2014), 26-30 May, 2014, Hotel JW Marriot, Chandigarh, India.

M. P. Joshi, J.G. Joshi and Shyam S. Pattnaik, “Wearable Microstrip Patch Antennas: A Review,”Elsevier Proceedings of 3rd International Conference on Recent Trends in Engineering & Technology (ICRTET’2014), pp.311-315, 28-30 March 2014.

R.R. Jagtap and S.D. Pable, “Width Optimization for Ultra Low Power Current Starved VCO,” submitted to Seventh International Conference on Contempory Computing (IC3), Delhi, India.

R.R. Jagtap and S.D. Pable, “Design of Low Power Current Starved VCO with Improved Frequency Stability,” IEEE International Conference on Recent Advances & Innovations in Engineering (ICRAIE-2014), May 09-11, 2014, Jaipur, India.

S. D. Pable and Mohd. Hasan, “Effect of Temperature Variation on Subthreshold Circuit Performances,” World Academy of Science, Engineering and Technology, 78, pp. 1576- 1581, 2013.

Ale Imran, S. D. Pable and Mohd. Hasan, “High performance optimized CNFET based current conveyor at 32nm technology node”, 2010 IEEE International Conference on Computer and Communication Technology (ICCCT-2010), pp.324-328, Sep. 17-19, 2010. (10.1109/ICCCT.2010.5640522)

International Journal OF IT Engg. & applied science (IJIEASR)VOL. 2 NO.1 Jan 2013 Neural n/w Issu 2319-4413, “ Signature registration and verification system using back propagation “ Prof B.M. Choudhari.

INVITED TALKS

Dr. S.D. Pabale Invited Talk on “VLSI Road Map Towards SoC” in State level workshop at KBT College of Engineering Nashik.

Invited talk on “Real time Operating Systems and Microcontrollers” at Sanjivani College of Engineering, Sangamner.

Invited talk on “Digital CMOS Design” at S.N.J.B. College of Engineering, Chandwad, Nashik.

Expert talk on “Applications of TCAD and Symica, real time Simulation software’s in area of CNTs” on 13th Jan. 2015, at PREC Loni, Ahmednagar.

Expert talk on “Analog CMOS Design,” at SITRC, Nashik.
Name Of Industry Or Location Date No. Of beneficiaries
Electronic Systems & Devices, Pune. 23/01/2013 - 27/01/2013 53
GAJANAN PARK, NASHIK 20/09/2013-21/09/2013 120
S.T.P. & W.T.P., NASHIK CORPORATION 06/03/2014 60
S.T.P. & W.T.P., NASHIK CORPORATION 07/03/2014 60
GAJANAN VALLEY, NASHIK 12/09/2014-13/09/2014 140
LIBERTY POINT, RAKA COLONY, NASHIK 06/03/2014 120
AIRPORT TERMINAL BUILDING, OZAR(NASHIK) 17/01/2014 120
NASHIK MUNICIPAL HOSPITAL, NASHIK ROAD 11/03/2014 120
GAJANAN PARK & MORYA PARK, NASHIK 26/03/2014 60
GAJANAN PARK & MORYA PARK, NASHIK 27/03/2014 60
GAJANAN PARK & MORYA PARK, NASHIK 20/03/2014 60
GAJANAN PARK & MORYA PARK, NASHIK 21/03/2014 60
SAMANGAON ROAD (ROAD MAINTENANCE) 07/07/2014 120
GANGAPUR DAM 20/09/2014 120
TRIMBAK ROAD (TALEGAON PHATA), NASHIK 24/09/2014 130
ROAD CONSTRUCTION, NASHIK 09/01/2015 120
ROAD CONSTRUCTION, NASHIK 09/01/2015 120
LAVASA KHADAKVASLA ,RADHANAGRI ,KOLHAPUR 11/02/2015 120
LAVASA KHADAKVASLA, RADHANAGRI , KOLHAPUR 18/02/2015 45
GANGAPUR DAM 03/10/2015 120
TRIMBAK ROAD, NASHIK 03/10/2015 120
PROFILE LEVELLING, NASHIK 01/10/2015 138
BLOCK CONTOURING, NASHIK 03/10/2015 138
SAI-VISHWA BUILDING (SAMANGAON ROAD) 05/01/2016 63
KARDA CONSTRUCTION SITE, NASHIK 25/02/2016 120
KARDA CONSTRUCTION SITE, NASHIK 26/02/2016 120
SAI-VISHWA BUILDING , NASHIK(SAMANGAON ROAD) 26/02/2016 60
NASHIK-PUNE HIGHWAY 09/09/2016 110
TRIMBAK VIDYAMANDIR, NASHIK 19/09/2016 120
POLYHOUSE NEAR TRIMBAK VIDYAMANDIR, NASHIK 19/09/2016 120
MOU Between Namrata Systems Mumbai & G.P. Nashik (Security &Audio Visual Solutions) under this course of IBMS is run for duration 26-07-2015 to 30-08-2015. Total No. of students participated 09. Total IRG generated 1,08,900 /-

MOU – ICS & GP Nashik - Institute of career & skills Nashik (Mahatmanagar , Nashik)& G.P. Nashik – Prop. Kishor Patil - Venue – ICS Nashik Primises situated at 301, pks business Bays Sigma hospital Mahatmanagar, Nashik.

First Shift

Year of Entry No. Of Students I Year(pass) II Year(pass) III Year(pass)
2016-2017 70 61(W)
--(S)
63(W)
--(S)
63(W)
--(S)
2015-2016 74 62(W)
59(S)
66(W)
65(S)
63(W)
59(S)
2014-2015 75 63(W)
57(S)
69(W)
65(S)
65(W)
59(S)
2013-2014 76 64(W)
62(S)
73(W)
67(S)
67(W)
63(S)

Second Shift

Year of Entry No. Of Students I Year(pass) II Year(pass) III Year(pass)
2016-2017 66 61(W)
--(S)
54(W)
--(S)
50(W)
--(S)
2015-2016 70 70(W)
56(S)
58(W)
54(S)
57(W)
53(S)
2014-2015 70 59(W)
63(S)
56(W)
57(S)
60(W)
50(S)
2013-2014 70 70(W)
61(S)
62(W)
63(S)
64(W)
57s(S)
NAME AND OFFICE ADDRESS PEC DESIGNATION
Prof. A.S. Laturkar
HOD, Electronics and telecommunication Engg. (I st Shift), Govt. Polytechnic, Nashik.
Chairman
Dr. S.D. Pabale
HOD, Electronics and telecommunication Engg. (II nd Shift), Govt. Polytechnic, Nashik.
Member
Mr. Anand S. Gharpure
Director,Sonic Multitech Pvt. Ltd. Nashik
Member(Industry Representative)
Mr. Prashant Suryavanshi
Surya Technologies, G16 Ujjwal Terraces, Dhayari Pune-51
Member(Industry Representative)
Shri. B.L. Kulkarni
Head of Electronics & Telecommunication Engineering Department Amrutvahini Polytechnic, Sangamner
Member(Academic Representative)
Shri. M.R. Patil
Lecturer in Electronic, Department of Electronics & Telecommunication Engineering Government Polytechnic, Nashik
Member
Dr. J.G. Joshi
Lecturer in Electronics, Department of Electronics & Telecommunication Engineering Government Polytechnic, Nashik
Member
Shri. Pramod U. Wayse
Deputy Secretary, MSBTE Regional Office, Aurangabad
Member